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Membrane Capacitance Measurement

The features described in the previous section allow not only for the cell membrane capacitance to be compensated, but also allow its accurate measurement, since the cap (CM) control is directly calibrated in capacitance units. However, there is also considerable interest in measuring time-dependent changes in membrane capacitance at the very highest possible resolution. The major application for such measurements is the study of cellular secretary processes, so we shall use this as the example in the following discussion. During vesicular excretion of substances from the cell, the contents are released from the cell by the fusion of the membrane of the vesicle with that of the cell, thereby increasing its area and thus also its capacitance. Fusion of an individual vesicle to the cell membrane may increase the cell capacitance by only a few femtofarads (i.e. thousandths of a picofarad), but massive secretary events involving the fusion of very many vesicles, such as occurs during the de-granulation of mast cells, may result in at least a doubling of the membrane capacitance.

Various methods have been described for the accurate measurement of changes in the cell capacitance, but in the past none has proved ideal, although we modestly hope that the Optopatch will resolve the difficulty of which one to choose. It seems generally accepted that the most sensitive method of measuring small changes in capacitance is by using the lock-in amplifier technique described by Neher and Marty (1982), and Lindau and Neher (1988), but in its basic form this technique is not so suitable for measuring larger changes, as both the sensitivity and linearity are lost as the capacitance shifts away from its starting value. Larger changes have therefore generally been measured by a variety of software methods, such as by analysing the time course of the current in response to step potential changes (e.g. Lindau and Neher, 1988). For users of commercial patch clamps, the software methods also have the advantage that no other special equipment is required, whereas the lock-in amplifier technique requires special hardware. Although this hardware does not have to be integrated into the patch clamp in order to apply the technique, it certainly makes sense to do so, and that strategy has allowed us to develop it further in the ways that we shall shortly describe. An intermediate technique has been to use software to simulate a lock-in amplifier (Joshi and Fernandez, 1988; Fidler and Fernandez, 1989). The software of the EPC-9 patch clamp provides an equivalent facility, although from published information (Sigworth, Affolter and Neher, 1995) it appears that a somewhat different algorithm is used. Although software simulations can at best only approach the performance of the equivalent hardware in respect of both resolution and speed of operation, they can be made to work effectively over a wider capacitance range (Fidler and Fernandez, 1989), because it is easier to keep them optimally adjusted. The capacitance measurement facilities on the Optopatch have been designed to combine the performance advantages of dedicated hardware with the wider measurement range and greater ease of use of the software-based approaches, by using novel additional circuitry that allows the lock-in amplifier always to remain perfectly balanced. The following paragraphs describe the basic operating principle of the lock-in amplifier technique and of our enhancements to it.

The equivalent circuit of the recording configuration contains only three components, i.e. access resistance, membrane resistance and membrane capacitance, but a full theoretical analysis of it for the purposes of capacitance measurement is actually far from straightforward. The article by Gillis (1995) covers the subject in detail. It is quite impressive that the analysis of such a simple circuit requires so much mathematics! This and the other papers cited above should be referred to for more detailed information on the application of the lock-in amplifier technique to this type of circuit, but the following discussion should provide sufficient background to explain the operation and use of the facilities provided on the Optopatch.

We'll first consider the simple case in which the membrane resistance is infinite, so that the only circuit components are the access resistance, Ra, and the membrane capacitance, Cm. The lock-in amplifier technique can be applied to this system as follows. The cell is voltage clamped at a suitable holding potential, usually close to its normal resting potential, and a sinusoidal command voltage of typically a few tens of millivolts peak-to-peak at a frequency of about 1KHz is superimposed on it. It is important that the voltage excursions do not cause significant ion channel activation, so that the membrane resistance remains high compared with the access resistance. The sinusoidal command voltage is effectively applied across Ra and Cm in series, and the patch clamp supplies and records the resulting sinusoidal current. If the current pathway were purely resistive, the current would be exactly in phase with the voltage, and its amplitude would be a measure of the resistance (it would actually be directly proportional to the conductance). On the other hand, if the current pathway consisted only of Cm, the phase of the current flow would be shifted by 90 degrees relative to the command voltage (the phase shift represents a differentiation, which arises because the current through the capacitor depends on the rate of rise of the voltage across it).

Strictly speaking, we should speak of capacitors drawing in and releasing current, because there is no actual current through them as there is through a resistor, but for AC signals capacitors behave as if there is, so it is a useful shorthand. The "resistance" of a capacitor falls with increasing frequency, so the more general term of impedance is used in this case. Unfortunately there is an inconsistency in the normally used measurement units, because the impedance of a capacitor is lower if the capacitance is greater, so from the current-passing point of view a large capacitance resembles a small resistance. However, the capacitance units make more sense when dealing with currents, and for consistency it is therefore preferable to quantify resistance's in their reciprocal units of conductance (the corresponding term to include capacitance as well is admittance), which is why some of the controls and outputs on the Optopatch are calibrated in conductance units.

We are now ready to consider the case of a capacitor and a resistor in series. The phases of the currents through them relative to the applied voltage must be the same as each other, so the voltages across the two components must be at 90 degrees to each other in order to maintain the phase relationships described above. This relationship is best illustrated by vectors. The vector sum of the two voltages at right angles is equal to the command voltage, and this gives us sufficient information to calculate their magnitude and phase, as Fig. 9 graphically shows. The phase angle of the voltage across the resistor must also be the phase angle of the current through both components, and the voltage across it, i.e. the length of the vector, gives the amplitude. Conversely, this means that if we measure the magnitude and phase of the current, we can calculate both Ra and Cm. Clearly, a large change in either Ra or Cm will affect the voltages across both of them, and therefore both the magnitude and phase of the current, but let us consider instead the effect of a very small change in either, in which case the effect on the other can be ignored. The geometrically equivalent approximation in Fig. 9 is to say that the length of the other voltage vector remains the same, which we can accommodate by allowing the angle between the two voltage vectors to deviate very slightly from 90 degrees. We can see by inspection of Fig. 9 that if Ra decreases slightly (i.e. the access conductance increases), the magnitude of its voltage vector will increase slightly, but its phase remains essentially unchanged. There will therefore be a change only in the magnitude of the current. On the other hand, if Cm increases slightly, the magnitude of the Ra vector, and hence of the current, will remain unchanged, but the effect of changing the length of the Cm voltage vector is to swing the Ra voltage vector around slightly. In this case, therefore, the effect is to change the phase of the current. The effect of a small phase change is equivalent to adding or subtracting a small component at a 90 degree phase angle, as vector addition of the type shown in Fig. 9 will immediately demonstrate.



Figure 9 - Model System for Membrane Capacitance Measurements

This is all well and good, but the current waveform would need to be measured with considerable precision in order to quantify and discriminate between these small changes, but the lock-in amplifier method allows us to play a trick that makes the task much easier.

We've already seen that the current that charges the membrane capacitance in response to a step change in the command potential can be supplied by an appropriate signal via a capacitor, instead of by the current-passing resistor (or equivalent components) in the headstage. Such currents therefore do not appear on the current output signal from the headstage. Exactly the same situation can apply to sinusoidal changes in the command potential, and the required series cond (GS) and cap (CM) control settings are the same. In both cases, when these controls are optimally adjusted, all the current will be passed by the capacitor, and the current output signal from the headstage will remain at zero.

If either Ra or Cm change by a small amount after adjustment of these controls, a small sinusoidal current will appear. This current will be in phase with the current supplied by the compensation capacitor if Ra changes, and at 90 degrees to it if Cm changes. The advantage of this recording situation is that the changes can now be measured directly as small signals, instead of being calculated from the difference between two large signals. However, Ra can change significantly during an experiment, so we have to be able to distinguish between changes in Ra and changes in Cm. This is the basic reason for using a lock-in amplifier, as it provides the required discrimination.

A lock-in amplifier can do this because it works as follows. It has two independent signal-processing paths, each of which can be switched electronically to have a gain of either plus one or minus one, and the two switches are driven by square waves that are of the same frequency as the input waveform, but of different and variable phase. The two outputs are then filtered to give DC signals. The operation of such a system is illustrated in Fig. 10. From this it can be seen that if the gain switching coincide with the zero-crossing points of the input signal, the signal is full-wave rectified to give a maximum DC output. In this example the output is positive, but it would be negative if either the input or the switching waveform were inverted. Conversely, if the gain switching coincide with the maximum and minimum values of the input signal, the DC output is zero. Gain switching at other points give intermediate outputs. In a practical circuit, the phases of the gain switching are variable with respect to the input signal, but a constant phase difference of 90 degrees is maintained between the two signal paths.



Figure 10 - Operating Principle of the Lock-In Amplifier.

As a technical point, we should note that switching the gain with a square-wave signal also detects signals which are odd harmonics of the square wave frequency, since a square wave is itself such a harmonic series. This can impair the noise performance of the system, since noise at the harmonic frequencies will also be detected. Our lock-in amplifier includes a low-pass input filter to reduce the amplitude of any harmonic signals to insignificant levels; the cut off frequency of this filter varies automatically according to the operating frequency of the lock-in amplifier. A side effect of this filter is to shift the phase of the fundamental frequency by about 45 degrees, which turns out to be quite useful as will be discussed later.

By sending the current output signal to a lock-in amplifier, we can therefore make the required discrimination between changes in access resistance and changes in membrane capacitance, IF we set the phase of the gain switching so that one output represents purely the capacitance signal and the other represents purely the resistance (conductance) signal. Since we've already seen from Fig. 9 that the required phase varies according to the values of these parameters, it also needs to be adjusted in the course of an experiment. Furthermore, the relation between a given small change in either parameter and the corresponding output from the lock-in amplifier is linear only for small changes, and the slopes also depend on the starting values (hence the possibility for so much mathematics). The various software approaches can be an attractive alternative, because however they work, they can hide any such complexity from the user, but the advantage of the lock-in amplifier method is that it is very sensitive. Not only has most of the current signal been balanced out before it is sent to the lock-in circuit, but also arbitrarily small signals at the gain-switching frequency can be measured if the outputs are sufficiently filtered, whereas other signals, including noise, are rejected. This makes it worthwhile to put up with the other problems.

One useful facility to assist the calibration can be to provide a capacitance "dither" switch or signal input, which changes the cap (CM) setting by a precise small amount, thereby superimposing a calibrated marker pulse on the capacitance output signal. In addition, it is a useful way of determining the correct phase, since it will then affect the capacitance output only. An alternative but equivalent method of phase determination is to dither the series cond (GS) setting instead, and to check that it only affects the resistance (conductance) signal, which is less useful for calibration purposes, but has the advantage of minimising the disturbance to the capacitance signal when the phase is already nearly correct (needless to say, we're going to make use of this idea). The Optopatch provides both cond and cap dither signal inputs, calibrated such that a 1V input corresponds to a dither of 1% of full-scale of each control, and there is also an internal 70Hz oscillator which can be used to dither GS. In order to enable these two inputs, the phase switch should be in the dither position.

While discussing the correct phase to use, we should note that Joshi and Fernandez (1988) have pointed out that the presence of a finite membrane resistance changes the situation slightly from the ideal one described above. The effect is that the phases of the currents that are measured in response to small changes in Ra and Cm are no longer precisely at 90 degrees to each other. This is because some of the current through the Ra now flows through the membrane resistance instead of the membrane capacitance, but as long as the proportion remains reasonably small, it does not significantly affect the capacitance measurement. From an accuracy point of view, the main effect is to introduce an error in the Ra estimation, which is of no practical consequence. However, in order to minimise the effects of changes in Ra on the Cm signal, the ideal approach is to set the phase by dithering Ra itself and adjusting for the minimum effect on the capacitance measurement, rather than by dithering the CM or GS controls as described above. This is a nice theoretical point, but in practice the difference between the phase settings determined by the two techniques is likely to be fairly small, and Gillis (1995) is of the opinion that their method of dithering Ra, by switching in a 1 megohm resistor in series with the electrode, is prone to other errors. In any case, the Optopatch incorporates a rather different method of dealing with the problem.

The possible need for frequent readjustment of the GS, CM and phase controls with the lock-in amplifier technique is clearly a disadvantage. It would be much nicer if these adjustments could be made continuously and automatically, so we have provided this as an optional facility in the Optopatch, which we call track mode. The idea is conceptually very simple. We use gain-controlled amplifiers in the automatic GS and CM compensation circuit, and we use the two outputs from the lock-in amplifier circuit to derive control voltages for these amplifiers. The outputs from these amplifiers are added to those from the main part of the GS and CM compensation circuit (which operates in the conventional way), causing them to change exactly as if the GS and CM control settings had been changed. The effect of this is to reduce the outputs from the lock-in amplifier, and by providing sufficient gain in the feedback loop, these outputs can be made to remain effectively at zero. Thus the circuit is always balanced, and even better, the resulting changes in the GS and CM control voltages generated by the two feedback loops are always directly related to the membrane capacitance and series conductance changes! In the Optopatch, changes in both Cm and Ra (measured as a conductance) are thus available as linear and calibrated signals, and they can also be read on the meter if required. The response time is also fast, i.e. in the millisecond range in our circuit, and our performance measurements confirm that the high resolution of the lock-in amplifier technique is preserved. We therefore suspect that users will always prefer to use the system in this way, although conventional operation of the lock-in amplifier also remains possible for comparative or other purposes.

To have the circuit simultaneously under the control of two independent feedback loops may sound impossible, but it is easy to prove that there is no significant interaction between them, by disabling one or other of them (although we could see no point in including this possibility in the final design). The reason is that a sine wave of any phase can be regarded as the sum of two independent components, of appropriate amplitude and at 90 degrees to each other. Therefore the lock-in amplifier with feedback can independently recognise and remove the resistive and the capacitive components of the residual current signal, since it actually sees the two components as two independent signals.

We also need to discuss the effect of the gain selector on the conductance and capacitance measurement facility. The lock-in amplifier is driven from the output of the gain stage, so when used conventionally, the real and imaginary outputs will both be amplified by an amount according to the gain setting. Before taking the gain setting into account, a 1V rms signal on the headstage current output will give a 1V DC output when the phase is optimised for detection of that signal, and the gain selector thus allows up to 1,000-fold amplification. In track mode, the gain selector is within the two feedback loops, so it does not affect the conductance and capacitance outputs in this case, but it DOES affect the amount of feedback (it varies the open-loop gain), which in turn affects both the response time and the stability of the system. The gain-selecting electronics of the Optopatch contains a programmable logic circuit, which has the capability of disabling the gain selector and providing a fixed gain instead under these conditions. However, we have decided to let the gain remain variable for the time being at least, so that users can help us determine the most appropriate gain to use, and to see whether varying it gives any practical advantages. For guidance though, we suggest a gain of 100 for the 100nA full-scale current range, or just 1 for the 1nA full-scale current range.

For the circuit to work properly, it is also important for the phase to be set appropriately, so we have included some additional optional facilities to cope with this. If the phase is badly wrong, the feedback pathways will become positive rather than negative, so the circuit will not stabilise, but as expected from feedback theory, phase errors even approaching of 90 degrees can be tolerated. As with the standard lock-in amplifier circuit, the effect of an incorrect phase setting will be that an error signal on the real phase (conductance) output, caused by a sudden change in Ra, will also be accompanied by an error signal on the imaginary phase (capacitance) output, but in this case it will do so only transiently. The reason for that is that even if the phase is somewhat incorrect, the double feedback loop will nevertheless succeed in reducing both outputs to zero, but during the settling period, the capacitance feedback loop will see a small signal to which it will react inappropriately until the conductance feedback loop, which still sees most of the signal, has removed it. Slow changes in Ra will not show up in the imaginary (capacitance) output at all, even if the phase is not optimally set, and we suspect this will prove to be a nice way of minimising any inaccuracies caused by the phase-shifting effect of a finite membrane resistance as pointed out in the Joshi and Fernandez (1988) paper referred to above.

Nevertheless, we could not resist the temptation to include the option of automatic phase tracking as well. In principle, we could compute the required phase shift from the command voltage frequency plus the initial values and subsequent automatic changes in the GS and CM settings, but this approach would be complicated and prone to a variety of errors. We therefore prefer the alternative approach of determining the required phase directly, since this will always work correctly. The method is to modulate the GS control voltage with a low-frequency sine wave (we use 70Hz), to simulate changes in this parameter. We then send the capacitance output signal from the lock-in amplifier to the input of another lock-in amplifier, which detects any 70Hz signal at that point. If there is any 70Hz signal on the capacitance output, then the phase of the main lock-in amplifier must be incorrect, and another feedback loop adjusts the phase (which is also a voltage-controlled parameter) in order to eliminate it. This lock-in amplifier needs to have only one switching element rather than two, and its switching phase is set so as to maximise its sensitivity to the 70Hz signal, but since this phase relationship doesn't change, that can be a fixed part of the circuit design. We chose 70Hz because it is a high frequency compared with the bandwidth over which the capacitance signals are normally measured, so any residual is easy to filter out, but it is a low frequency compared with that of the command voltage, so it is clearly detectable on the capacitance output. Both this and the conductance output are three-pole Bessel filtered with a cut-off frequency of 100Hz, so the 70Hz signal is relatively little affected by these filters. In practice, further filtering of the capacitance signal is advisable in any case, so that will easily remove any residual 70Hz component from it. Under our test bench conditions, the residual 70Hz output before filtering was only about 1mV, whereas the full-scale output is 10V, so the intrusion of the 70Hz signal really should be negligible.

The response time of the phase tracking circuit has deliberately been made relatively long, for several reasons. First, this minimises any possible interaction with the automatic GS and CM feedback loops, which, as already explained, do not require a perfect phase setting in order to function. Therefore, on the time scale seen by the 70Hz loop, the automatic GS and CM settings are always correct. Second, a longer integration period within the 70Hz loop allows a smaller 70Hz signal amplitude to be used (we suspect that the level of the 70Hz signal could be further reduced if there was any point in doing so). Third, relatively substantial changes in GS and/or CM are required to cause a significant phase shift, so the required phase is most unlikely to shift at all rapidly. Our circuit has a response time of a few seconds, which we expect will be fast enough to allow sufficiently accurate tracking under any reasonable experimental conditions.

The complete circuit is thus rather complicated, but the individual components are not particularly expensive, and the overall cost of this method is much less than that of the computer that would be required to do all this in software. Furthermore, it allows fast, sensitive, accurate and calibrated measurement of membrane capacitance in real time, which we do not believe any other method can offer. In general, the software approach to solving any problem is powerful, important, and occasionally wonderful (we even love some software ourselves), but it would take an enormous amount of digital processing to match what our analogue circuits are doing here!

The best way of describing the controls for capacitance measurement is to describe the typical experimental sequence. First of all, the cell is patched, the patch is blown to give whole-cell voltage clamp recording, and the frequency generator is set to give a sine wave of appropriate amplitude and frequency. Note that the internal oscillator MUST be used, as it generates signals at three different phases in order to drive the lock-in amplifier and phase control electronics, and an external signal would be unable to do this. For small capacitances, below 10pF, the small cell mode can be used, but depending on the access resistance, a frequency somewhat higher than the 1KHz recommended above may give better results. Trial and error will show what is best, and the lock-in amplifier system will work at frequencies up to 100KHz, so there are no limitations there!

Neither precharging nor series resistance compensation are appropriate for capacitance measurement, so both these controls should be set to their minimum positions. The RC comp switch should be on, and the series cond (GS) and cap (CM) controls should be adjusted to cancel the sinusoidal output current. The lock-in amplifiers take their input signal after it has gone through the gain stage, but before the four-pole variable filter. Therefore the gain control also determines the gain of the lock-in system. The best gain to use is also a matter of choice and experiment, but relatively low values are most appropriate, and we recommend a gain of 1 to start with (too high a gain in automatic mode will cause instability). Next, the lock-in amplifier circuit should be activated, by setting the phase switch to the on position (when not performing capacitance measurement, we recommend that this switch should be off, to prevent the unnecessary generation of the gain-switching signals for this circuit). The resistance (actually, conductance) and capacitance outputs from the lock-in circuit are available on two rear panel sockets, and they can also be read on the meter in its selector switch is in the GS and CM positions.

We are now ready to set the phase control. This control covers a total phase range of 180 degrees, to give a reasonable safety margin over the range required in practice, and unlike simple phase-shifting circuits, the phase shift it produces is independent of frequency. For best discrimination between conductance and capacitance changes, the sine wave frequency should be such as to give about a 45 degree phase shift in the current relative to the voltage (Fig. 9 shows the reason for this). As explained in the description of the lock-in amplifier, our design includes a tracking low-pass filter that introduces an additional phase shift of approximately 45 degrees, also regardless of frequency, giving about 90 degrees altogether. This very conveniently means that an initial phase setting of about one-half of full-scale should be aimed for.

There are at least two ways of checking the adjustment. One method is to de-tune the GS and CM settings manually, and to observe the effects on the real and imaginary phase outputs. The phase is correct when the adjustment of either control affects only the appropriate output. Note that, for example, to simulate the effect of an INCREASE in membrane capacitance, for which a positive output change is clearly appropriate, the setting of the CM control must be correspondingly REDUCED, so don't let this confuse you! The other method is to use the dither facilities, particularly the built-in 70Hz oscillator to dither the GS signal (its level is variable by the control on the rear panel). The oscillator is activated by setting the phase switch to the dither position, and the phase control should then be adjusted to minimise the 70Hz signal on the capacitance output of the lock-in amplifier.

The next stage is to select the automatic position on the RC comp switch, but to take things one step at a time, we shall assume that the phase switch is in the on position rather than in the dither position. If the series cond (GS), cap (CM) and phase controls were (more or less) correctly set, the real and imaginary phase outputs should remain at or near zero, but their function has nevertheless changed. They now carry the error voltages generated by the lock-in amplifiers to maintain zero sinusoidal output current. These voltages have the same gain relationship as the cond and cap output voltages, i.e. 10V for a full-scale change. Note that the outputs can change in either direction, so negative values may also be generated, provided of course that the total control voltage remains positive. The fact that these outputs represent capacitance (and conductance) changes, and therefore start from zero, allow them to be amplified by other equipment if required, without ending up with large DC signals. If a large DC signals do develop as a result of more substantial changes in access resistance or cell capacitance, they can easily be removed by readjusting the GS or CM controls, but the development of large signals in no way affects the accuracy of the system, so long as the phase remains correct. On the other hand, these difference voltages are also added to the series cond and cap outputs, allowing the total capacitance and conductance to be monitored if preferred.

The final option is to select automatic phase tracking as well, by setting the phase switch to the dither position. This dithers the GS control voltage at 70Hz as before, and another lock-in amplifier measures its amplitude on the capacitance signal output. The 70Hz lock-in amplifier needs to have only one output, which will be zero when the phase is set correctly, otherwise there will be a positive or negative output according to the direction of the phase error. The output is added to the voltage set on the phase potentiometer, to produce the total control voltage for the phase shifter. The effect is to shift the phase so as to minimise the 70Hz signal on the capacitance output. Since the required phase is unlikely to shift very far or very fast, we have limited the response speed and phase adjustment range of this control loop, in order to prevent any risk of it interacting in any way with the rest of the circuit. In order to indicate the extent of any automatic phase adjustment that is made in this way, the error output voltage can be displayed on the meter by selecting the "phase" position on the meter switch. The total phase adjustment range is nominally plus and minus 45 degrees, which corresponds to +10V and -10V on the meter. The relation between the control voltage and the phase shift is reasonably linear but not precisely so, and this facility is not intended for precise phase shift measurement (which is unlikely to be of much interest). Instead, it is intended to show whether the circuit is nearing either end of its adjustment range. If it is, the manual phase control should slowly be adjusted to reduce the automatically applied component back towards zero - or maybe better, the operating frequency should be changed to produce the same effect.

In general, only the capacitance signal will be of major interest during experiments, so the conductance signal can often be ignored, although it is advisable to pay some attention to it in case substantial changes are occurring. Even so, accurate recording of it is unlikely to be warranted. On the other hand, accurate recording of the capacitance signal certainly is warranted. Our measurements with model systems confirm that capacitance changes well below 0.1% of full scale can be resolved (the results we achieved were actually so good that we are reluctant to quote them, because it seems unlikely that real cells would perform so well, and we don't want to mislead). The actual capacitance resolution achievable depends on a number of factors, but in order to increase it (at the extent of poorer time resolution), additional filtering can be applied. We have therefore provided a switch to send the capacitance output signal to the four-pole variable filter, and its operating range extends down to the relatively low frequencies, i.e. about 1-100Hz, that are appropriate for this application.


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